SPIE Proceedings Vol. 2597

Machine Vision Applications, Architectures, and Systems

Integration IV Editor(s): Bruce G. Batchelor, Univ. of Wales College Cardiff, Cardiff, Wales, United Kingdom; Susan S. Solomon, CSPI, Billerica, MA, USA; Frederick M. Waltz, Univ. of Minnesota/Twin Cities, Mendota Heights, MN, USA.

ISBN: 0-8194-1961-3, 336 pages Published 1995 Meeting Date: 10/22 - 10/26/95, Philadelphia, PA, USA

Paper #: 2597-09, pp.70-81

High-speed image procesing using the TMS320C40 parallel DSP chip

Authors:

Mark Graves, Intelligent Manufacturing Systems Ltd., Birmingham W Midlands, United Kingdom; David Riddoch, Intelligent Manufacturing Systems Ltd., Birmingham W Midlands, United Kingdom; Bruce G. Batchelor, Univ. of Wales College Cardiff, Cardiff, Wales, United Kingdom.

Abstract:

Performing complex image processing operations on digital signal processing (DSP) chips offers a great deal of flexibility compared to hardware based solutions, although the later are generally much faster. In this paper the authors fully evaluate the TMS320C40 chip which is a state of the art DSP chip specially designed for highly intensive computations such as image processing, with the extra flexibility of having in-built communication ports to enable parallel processing.